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  • 标题:Investigation of Electromagnetic Interference in CMOS Power Distribution Networks
  • 本地全文:下载
  • 作者:M.Lakshminarasimhacharyulu ; Murthy sarma ; K. Lal kishore
  • 期刊名称:International Journal of Engineering Research
  • 印刷版ISSN:2319-6890
  • 出版年度:2013
  • 卷号:2
  • 期号:7
  • 页码:424-431
  • 出版社:IJER
  • 摘要:EM1 noise reduction is generally accomplished by three means: suppression of noise source, isolation of noise coupling path, and filter shielding. In this paper, another means of EMI noise reduction is p roposed is Simultaneous switching noise (SSN) has become an important issue for generation of EMI effect in the desig n of the internal on chip power distribution networks in current very large scale integration/ultra large scale integration circuits. An inductive model is used to characterize the power supply rails when a transient current is generated by simultaneously switching the on-chip registers and logic gates in a synchronous CMOS VLSI/ULSI circuit. An analytical expression characterizing the SSN voltage is presented here based on a lumped inductive- resistive-capacitive model. The peak value of the SSN voltage based on this analytical expression is within 10% as compared to SPICE simulations. Design constraints at both the circuit and layout levels are also discussed based on minimizing the effects of the peak value of the SSN voltage.
  • 关键词:Integrated circuit interconnection; on-chip ; inductance; pow er distribution network; simulta neous ; switching noise.
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